The present invention relates generally to digital-to-analog conversion for converting a digital input signal to an analog output signal, and more particularly to a method and apparatus for implementing the digital-to-analog conversion using a plurality of conversion schemes.
A variety of approaches have been proposed for the digital-to-analog conversion. For example, such approaches include a so-called multi-bit scheme which converts a binary-weighted M-bit digital signal input to an analog signal using converting elements that weight the digital signal input with binary weights, and a one-bit scheme using a delta-sigma modulator which has been rapidly widespread due to a higher digital signal processing speed resulting from the advance of recent semiconductor integrated circuit technologies. While these schemes may be further subdivided according to a difference in electric. circuit connection of the converting elements or a difference in the type of the converting elements, the digital-to-analog conversion is basically classified into the two schemes. The multi-bit scheme is characterized by a high signal-to-noise (SN) ratio resulting from the absence of special digital circuits. However, if the converting element composed of semiconductor integrated circuits does not provide a sufficient relative accuracy, the multi-bit scheme has problems in the linearity of level and deteriorated distortions, in which case, the accuracy must be improved through a trimming technique, leading to a tendency to a higher cost.
On the other hand, the one-bit scheme can provide high linearity by oversampling a digital signal at a high signal processing frequency relative to a signal band to move quantization noise of a one-bit signal to the outside of a required band. However, since the one-bit scheme processes a digital signal at a high frequency as mentioned, it is difficult to achieve a high SN ratio when this scheme is implemented by semiconductor integrated circuits.
Thus, a digital-to-analog converter referred to as an advanced onebit scheme has been proposed as a composite multi-bit and one-bit scheme for canceling the drawbacks of the two schemes. This converter separates a 16-bit binary digital signal into two signal groups consisting of upper bits and lower bits. A multi-bit converter of a resistor ladder type employing a trimmed resistor converting element is used for the upper bits, while a one-bit signal converter employing the delta-sigma scheme is used for the lower bits, and a final analog output unit is provided to combine analog outputs of the two converters. A digital-to-analog converter for PCM audio implemented by this advanced one-bit scheme has accomplished high performance with the SN ratio as high as 110 dB.
The advanced one-bit scheme, however, is disadvantageous in that the reference levels of the respective converters for the analog outputs differ slightly from each other due to errors involved in the manufacturing of integrated circuits. Therefore, when the analog signals of the respective converters are combined, distortion will occur at a combination point due to a relative error of the reference levels to degrade the entire analog output characteristics.
As described above, a digital-to-analog converter composed of a plurality of converters suffers from a relative error of one converter to another.
It is therefore an object of the present invention to provide a digital-to-analog converter which is capable of reducing the above mentioned relative error between analog outputs of the multi-bit converter and the onebit signal converter of the above mentioned advanced one-bit scheme to accomplish highly accurate analog output characteristics.
It is another object of the present invention to provide a method and apparatus for realizing a highly accurate digital-to-analog conversion by using two or more digital-to-analog (D/A) conversion type digital signal processing schemes in the digital-to-analog conversion.
It is a further object of the present invention to provide a method and apparatus for use with two or more mutually different D/A conversion schemes, which are capable of reducing relative errors among outputs lresulting from the respective conversion schemes.
To achieve the above objects, a digital-to-analog converting method for generating an analog output signal representative of a received digital input signal comprised of a plurality of bits in accordance with the present invention comprises the steps of forming a plurality of bit groups from the plurality of bits of the digital input signal; processing each of the plurality of bit groups using at least one predetermined digital-to-analog conversion type digital signal processing scheme to generate a weight generation control output, so that a plurality of weight generation control outputs are generated for the plurality of bit groups; digitally adding the plurality of weight generation control output to generate a composite weight generation control output; and controlling, by means of combination switches for the weight generating elements, a plurality of weight generating elements in response to the composite weight generation control output to generate an analog output signal representative of the digital input signal. According to the present invention, the digital-to-analog converting method may further include the step of digitally processing the composite weight generation control output by means of encoding logic in order to accomplish the dynamic element averaging for producing the control output.
Also, a digital-to-analog converter for generating an analog output signal from a received digital input signal comprised of a plurality of bits in accordance with the present invention comprises dividing means for forming the plurality of bits of the digital input signal into a plurality of bit groups; a plurality of bit group weight generation control means coupled to receive the plurality of bit groups, respectively, where each of the plurality of weight generation control means processes the bit group associated therewith using a predetermined digital-to-analog conversion type digital signal processing scheme to generate a weight generation control output, so that a plurality of the weight generation control outputs are generated; adder means for digitally adding the plurality of weight generation control outputs to generate a composite weight generation control outputs; and weight generating means including a plurality of weight generating elements for controlling the plurality of weight generating elements in response to the composite weight generation control output to generate an analog output signal representative of the digital input signal.
Also, according to the present invention, the converter may further include digital signal processing means for digitally processing the composite weight generation control output.
Further, a digital-to-analog converter in accordance with the present invention converts a digital signal to an analog signal by a combination of a first digital signal processing unit for separating a digital signal input sequence weighted according to the digit by at least one or more arbitrary digits to produce K digital signal input sequences (for example, by separating a serial digital signal input weighted according to the digit (column), by at least one or more arbitrary digits to produce K serial digital signal inputs, for example, by separating 10001111000011110000001 into 1000 1111 0000111 110000001, wherein K=4); a second digital signal processing unit including a plurality of means for digitally processing the K separated digital signal input sequences to convert the K separated digital signal input sequences to K second digital signal groups representative of levels of the K separated digital signal input sequences associated therewith; a third digital signal processing unit for converting the K second digital signal groups to a third digital signal group representative of a level; and a group of digital-to-analog converting elements comprised of a plurality of N substantially equivalent weight generating elements for an M-bit output of the third digital signal group representative of the level.
According to the present invention, the group of analog-to-digital converting elements comprised of substantially equivalent weight generating elements for an M-bit output of the third digital signal group may include the number N of converting elements which is equal to or larger than M. Further, according to the present invention, the third digital signal processing unit has a function of averaging the digital-to-analog converting elements with respect to a time axis.
Furthermore, according to the present invention, the second digital signal processing unit for converting to K second digital signal groups may linclude at least one sigma-delta conversion digital signal processor.